In present day data processing systems most of the circuits, and more particularly the logic circuits, are in the form of integrated circuits. Efforts continue to be made to increase the density of the integration of the circuit components on a single semiconductor substrate or chip. In a typical system there may be a hundred such chips in one thermal conduction module (TCM). There may be several TCMs in a computer system. For today's bipolar logic chips, logic performance speed is a function of the power that is available for the critical logic paths and circuit delays. For chips with five thousand or more logic gates the power budget and delays indeed limit the speed of the computer system it is used in. Push-pull drivers are widely used on these logic chips in all off-chip applications. There is a need for faster and more efficient drivers for driving signals between chips. The use of differential cascode current switch circuitry is well known, as disclosed in U.S. Pat. No. 4,513,283 of Lininger entitled "Latch Circuits with Differential Cascode Current Switch Logic", U.S. Pat. No. 4,760,289 of Eichelberger et al. entitled "Two Level Differential Cascode Current Switch Masterslice" and U.S. Pat. No. 4,686,392 of Lo. The driver used herein is particularly for use with differential cascode circuitry which requires less current and is lower power than ECL (Emitter Coupled Logic) circuitry. The logic is provided by a pair of wires, and for a logic "1" level, 0.6 volts is on one lead and 0.4 volts is on the other lead, and for a logic "0", the levels are reversed. A 20 percent increase in performance is believed to be achieved using this differential cascode current switch as compared to an ECL masterslice running the same power.
A two level differential cascode driver is also disclosed in Chu et al., U.S. Pat. No. 5,124,591 issued Jun. 23, 1992, entitled "Low Power Push Pull Driver", incorporated herein by reference (case has been allowed).